A new I2L process for a high performance I2L structure is proposed. The modifiedstructure consists of a heavily doped extrinsic base and lowly doped intrinsic base where the collector regions are self-alignment with the intrinsic base regions. The proposed process untilizes spin-on sources as the diffusion sources and the self-alignment of collectors is achieved by using the hardened spin-on source as a diffusion mask. Test devices including a 13-stage ring oscillator have been fabricated by the proposed process on n/n+ silicon wafers with 6.5$mu$m epitaxial layer. The maximum upward current gain of npn transistors is 8 for a three collector I2L cell. The speed-power product and minimum propagation delay for a one collector structure are 3.5 pJ and 50 ns, respectively.