In a switching node or an ATM multiplexer of the ATM network, a good bandwidth utilization can be achieved by the priority control using the 1-bit(Cell Loss priority) in ATM cell header. In this paper, the mixed mechanism is proposed to make up for shortcomings of existing space priority control mechanisms and to decrease the loss probability of high priority cell and its performance is analyzed about the cell loss probability. To estimate the performance of proposed mixed mechanism, its cell loss probability is compared with those of non-priority mechanism, push-out mechanism and partial buffer sharing mechanism. The cell loss probability is analyzed using a M/D/1/N modeling and a 2-state MMPP/D/1/N modeling and also comparison between two modelings is made. To verify this result of numerical analysis, the computer simulation is performed for each mechanism using the simulation language, SIMSRIPT II.5.