In this paper, we designed POCSAG Signal Decoder to improve operating time in pager. We showed POCSAG Signal Pattern sent by transmitter and operation of this decoder. We also showed that the Pager using this decoder was equipped with Wide Area Signal Detection and designed the hardware which realizes this operation and implemented it with ASIC chip. As we inspected the function of the ASIC chip and tested the performance, we could find that the chip operated in low voltage and that power dissipation was low.