Generally, electronic packaging designer uses HSPICE SOFTWARE TOOL to validate electric characteristics of traces layout before layout traces in PCB in hundreds Mb/s high speed digital circuits. We are in need of a plated through hole (PTH) model and a connector model to use HSPICE SOFTWARE TOOL. Those models have not been perfectly defined for HSPICE simulation. In this paper, we define a PTH model and a connector model for HSPICE simulation and discuss application range for these models. Th emodels are analytic models very applicable for HSPICE simulation and are used to analyze electric characteristic of the PTH and the connector in thetraces layout in high speed digital circuit.