This paper deals with an active gate drive (AGD) technolo밍T for high power IGBTs. It is based on an optimal c combination of several requirements necessmy for good switching performance under hard switching conditions, The s scheme specifically combines together the slow drive requirements for low noise and switching stress and the fast driver requirements for high speed switching and low switching energy loss The gate drive can also effectively dampen oscillations during low cunent turnlongrightarrowon transient in the IGBT, This paper looks at the conflicting requirements of the c conventional gate dlive circuit design and the experimental results show that the proposed threelongleftarrowstage active gate dlive t technique can be an effective solution.