Electromigration Phenomena in Al-1%Si thin film interconnections under DC and PDC conditions were investigated. Thin film interconnections with $SiO_2$ and PSG/$SiO_2$ dielectric passivation layer were formed by a standard photolithography process method and test line lengths were 100, 400, 800, 1200, and 1600 $mu extrm{m}$. The current density of $1.19 imes10^7 extrm{A/cm}^2$ was stressed in Al-1%Si thin film interconnections under DC condition. The current density of $1.19 imes10^7 extrm{A/cm}^2$ was also applied under PDC condition at the frequency of 1 Hz with the duty factor of 0.5. The electromigration resistance of PSG/SiO2 dielectric passivation test line was stronger than $SiO_2$ dielectric passivation test line. The lifetime under PDC was 2-4 times longer than DC condition. As the thin film interconnection line increased, the lifetime decreased and saturated over the critical length. Failure patterns by an electromigration were dominated by void-induced electrical open and hillock-induced electrical short.