- 대형 회로망 그래프 마디축소 모델
- ㆍ 저자명
- 황재호,Hwang. Jae-Ho
- ㆍ 간행물명
- 전기학회논문지. The transactions of the Korean Institute of Electrical Engineers. D / D, 시스템 및 제어부문
- ㆍ 권/호정보
- 2001년|50권 2호|pp.93-99 (7 pages)
- ㆍ 발행정보
- 대한전기학회
- ㆍ 파일정보
- 정기간행물| PDF텍스트
- ㆍ 주제분야
- 기타
A new type geometric and mathematical network reduction model is introduced. Large-scale network is analyzed with analytic approach. The graph has many nodes, branches and loops. Circuit equation are obtained from these elements and connection rule. In this paper, the analytic relation between voltage source has a mutual different graphic property. Node-reduction procedure is achieved with this circuit property. Consequently voltage source value is included into the adjacent node-analyzing equation. A resultant model equations are reduced as much as voltage source number. Matrix rank is (n-1-k), where n, k is node and voltage source number. The reduction procedure is described and verified with geometric principle and circuit theory. Matrix type circuit equation can be composed with this technique. The last results shall be calculated by using computer.