One of the most important things in the research for MIN-based switch operation the management scheme of network cycle. In the traditional MIN, when the receving buffer module is empty, the sell has to move forward the front-most buffer position by the characteristic of the conventional FIFO queue. However, most of buffer modules are almost always full for practical amount of input loads. The long network cycle of the traditional scheme is thus a substantial waste of bandwidth. In this paper, we propose the modeling method for the input and multi-buffered MIN with unit step buffering scheme, In spite of simplicity, simulation results show that the proposed model is very accurate comparing to previous modeling approaches in terms of throughput and the trend of delay.