We investigated the void formation in composite-titanium silicide($TiSi_2$) process. We varied the process conditions of polycrystalline/amorphous silicon substrate, composite $TiSi_2$ deposition temperature, and silicidation annealing temperature. We report that the main reason for void formation is the mass transport flux discrepancy of amorphous silicon substrate and titanium in composite layer. Sheet resistance in composite $TiSi_2$ without patterns is mainly affected by silicidation rapid thermal annealing (RTA) temperature. In addition, sheet resistance does not depend on the void defect density. Sheet resistance with sub-0.5 $mu extrm{m}$ patterns increase abnormally above $850^{circ}C$ due to agglomeration. Our results imply that $sub-750^{circ}C$ annealing is appropriate for sub 0.5 $mu extrm{m}$ composite X$sub-750_2$ process.