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RSFQ 1-bit ALU의 디자인과 시뮬레이션
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  • RSFQ 1-bit ALU의 디자인과 시뮬레이션
  • Design and Simulation of an RSFQ 1-bit ALU
저자명
김진영,백승헌,강준희
간행물명
Progress in superconductivity
권/호정보
2003년|5권 1호|pp.21-25 (5 pages)
발행정보
한국초전도학회
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이 논문은 한국과학기술정보연구원과 논문 연계를 통해 무료로 제공되는 원문입니다.
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기타언어초록

We have designed and simulated an 1-bit ALU (Arithmetic Logic Unit) by using a half adder. An ALU is the part of a computer processor that carries out arithmetic and logic operations on the operands in computer instruction words. The designed ALU had limited operation functions of OR, AND, XOR, and ADD. It had a pipeline structure. We constructed an 1-bit ALU by using only one half adder and three control switches. We designed the control switches in two ways, dc switch and NDRO (Non Destructive Read Out) switch. We used dc switches because they were simple to use. NDRO pulse switches were used because they can be easily controlled by control signals of SET and RESET and show fast response time. The simulation results showed that designed circuits operate correctly and the circuit minimum margins were +/-27%. In this work, we used simulation tools of XIC and WRSPICE. The circuit layouts were also performed. The circuits are being fabricated.