Digital signal processing hardware based in RNS is currently considered as an important method for high speed and low cost hardware realization. This research designs and implements the method for conversion from a specific residue number system with moduli of the from $(2^k-1, 2^k, 2^k+1)$ to a weighted number system. Then, it simulates the implementation using a overlapped multiple-bit scanning method in the process of CRT conversion. In conclusion, the simulation shows that the CRT method which is adopted in this research, performs arithmetic operations faster than the traditional approaches, due to advantages of parallel processing and carry-free arithmetic operation.