- 디지털 위상 고정 루프를 이용한 계전기용 정밀 주파수 측정 장치
- ㆍ 저자명
- 윤영석,최일흥,이상윤,황동환,이상정,박장수
- ㆍ 간행물명
- 전기학회논문지. The transactions of the Korean Institute of Electrical Engineers. A / A, 전력기술부문
- ㆍ 권/호정보
- 2004년|53권 7호|pp.365-374 (10 pages)
- ㆍ 발행정보
- 대한전기학회
- ㆍ 파일정보
- 정기간행물| PDF텍스트
- ㆍ 주제분야
- 기타
The relay measures the frequency of the power system in order to detect faults and separate them from the system. Many estimation algorithms for the relay have been proposed to accurately measure the frequency. This paper proposes a new frequency measurement method using the digital phase locked-loop(DPLL) for the relay of the power system. The proposed method is configured with a DPLL scheme and verified through computer simulations and experimental tests. In order to cope with noises in the power system, filters are included in the input signal processing part and the frequency comparator. MATLAB is used for computer simulations and an experimental setup with a CPU and an FPGA(Field Programmable Gate Array) is constructed. The loop filter of the DPLL is run in the CPU software In adjust parameters and others are in the FPGA. Experimental tests are performed lot a function generator and the power system. Results show that the proposed method is appropriate to the frequency measurement for the relay.