The advanced semiconductor technology and electronic design automation(EDA) tools make it possible to implement the system on the programmable logic devices. The electronic design method is also changing from schematic capture to hardware description language. In this paper, I present the architecture of multi-dimensional digital filter which can be efficiently implemented on PLDs. This is based on the former research results which are called algorithm decomposition technique. Algorithm decomposition technique is used to obtain the computational primitive from the state space equations of the multi-dimensional digital filtering algorithm. The obtained computational primitive is designed with VHDL. This can be used to implement the filtering system as a component. The designed filtering system is implemented on the PLD. Therefore, the filter can be upgradable on system. It is greatly reduced the time-to-market time of the system that is based on the multi-dimensional filter.