This paper presents a design of an FPGA (Field Programmable Gate Array) -based currentcontroller. Using the nature of the high computational capability of FPGA, the digital delay due to the algorithm execution can be reduced. The control performance can be better than the conventional DSP (Digital Signal Processor)-based current controller. Moreover, this method does not need any delay compensation algorithm because the digital delay is physically diminished. Therefore, the bandwidth of the current controller can be extended by this method. The feasibility of this method is verified by several experimental results under the various conditions.