Mo(Ti) alloy and pure Cu thin films were subsequently deposited on $SiO_2-coated$ Si wafers, resulting in $Cu/Mo(Ti)/SiO_2$ structures. The multi-structures have been annealed in vacuum at $100-600^{circ}C$ for 30 min to investigate the outdiffusion of Ti to Cu surface. Annealing at high temperature allowed the outdiffusion of Ti from the Mo(Ti) alloy underlayer to the Cu surface and then forming $TiO_2$ on the surface, which protected the Cu surface against $SiH_4＋NH_3$ plasma during the deposition of $Si_3N_4$ on Cu. The formation of $TiO_2$ layer on the Cu surface was a strong function of annealing temperature and Ti concentration in Mo(Ti) underlayer. Significant outdiffusion of Ti started to occur at $400^{circ}C$ when the Ti concentration in Mo(Ti) alloy was higher than 60 at.%. This resulted in the formation of $TiO_2/Cu/Mo(Ti);alloy/SiO_2$ structures. We have employed the as-deposited Cu/Mo(Ti) alloy and the $500^{circ}C-annealed$ Cu/Mo(Ti) alloy as gate electrodes to fabricate TFT devices, and then measured the electrical characteristics. The $500^{circ}C$ annealed Cu/Mo($Ti{geq}60at.%$) gate electrode TFT showed the excellent electrical characteristics ($mobility;=;0.488;-;0.505;cm^2/Vs$, on/off $ratio;=;2{ imes}10^5-1.85{ imes}10^6$, subthreshold = 0.733.1.13 V/decade), indicating that the use of Ti-rich($Ti{geq}60at.%$) alloy underlayer effectively passivated the Cu surface as a result of the formation of $TiO_2$ on the Cu grain boundaries.