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Further Specialization of Clustered VLIW Processors: A MAP Decoder for Software Defined Radio
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  • Further Specialization of Clustered VLIW Processors: A MAP Decoder for Software Defined Radio
  • Further Specialization of Clustered VLIW Processors: A MAP Decoder for Software Defined Radio
저자명
Ituero. Pablo,Lopez-Vallejo. Marisa
간행물명
ETRI journal
권/호정보
2008년|30권 1호|pp.113-128 (16 pages)
발행정보
한국전자통신연구원
파일정보
정기간행물|ENG|
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이 논문은 한국과학기술정보연구원과 논문 연계를 통해 무료로 제공되는 원문입니다.
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기타언어초록

Turbo codes are extensively used in current communications standards and have a promising outlook for future generations. The advantages of software defined radio, especially dynamic reconfiguration, make it very attractive in this multi-standard scenario. However, the complex and power consuming implementation of the maximum a posteriori (MAP) algorithm, employed by turbo decoders, sets hurdles to this goal. This work introduces an ASIP architecture for the MAP algorithm, based on a dual-clustered VLIW processor. It displays the good performance of application specific designs along with the versatility of processors, which makes it compliant with leading edge standards. The machine deals with multi-operand instructions in an innovative way, the fetching and assertion of data is serialized and the addressing is automatized and transparent for the programmer. The performance-area trade-off of the proposed architecture achieves a throughput of 8 cycles per symbol with very low power dissipation.