This work shows how the adoption of a dual-dicing process for silicon wafer separation affects the thermal-cycling reliability (i.e. $-65^{circ}C$ to $150^{circ}C$) of the semiconductor devices utilizing lead-on-chip (LOC) die attach technique. In-situ examinations show that conventional single-dicing process directly attacks the edge region of diced devices but dual-dicing process effectively protects the edge region of diced devices from dicing-induced mechanical damage. Probably, this is because the preferential and sacrificial fracture of notched regions induced on the active surface of wafers saves the edge regions. It was also investigated through thermal-cycling tests that the number of thermal-cycling induced failures is much lower at the dual-dicing process than the single-dicing process.