We present the performance test results of VLBI Correlation Subsystem (VCS) trial product which was being developed for 1 year from August 2007. It is a core component of Korea-Japan Joint VLBI Correlator (KJJVC). The aim for developing VCS trial product is to improve the performance of VCS main product to reduce the efforts and cost, and to solve the design problems by performing the preliminary test of the manufactured trial product. The function of VCS trial product is that it is able to process the 2 stations-1 baseline, 8 Gbps/station speed, 1.2 Gbps output speed with FX-type. VCS trial product consists of Read Data Control Board (RDC), Fourier Transform Board (FTB), and Correlation and Accumulation Board (CAB). Almost main functions are integrated in the FTB and CAB board. In order to confirm the performance of VCS trial product functions, the spectral analysis, delay compensation and correlation processing experiments were carried out by using simulation and real observation data. We found that the overflow problem of re-quantization after FFT processing was occurred in the delay compensation experiment. We confirmed that this problem was caused by valid bit-expression of the re-quantized data. To solve this problem, the novel method will be applied to VCS main product. The effectiveness of VCS trial product has been verified through the preliminary experimental results, but the overflow problem was occurred.