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Design of a New Harmonic Noise Frequency Filtering Down-Converter in InGaP/GaAs HBT Process
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  • Design of a New Harmonic Noise Frequency Filtering Down-Converter in InGaP/GaAs HBT Process
  • Design of a New Harmonic Noise Frequency Filtering Down-Converter in InGaP/GaAs HBT Process
저자명
Wang. Cong,Yoon. Jae-Ho,Kim. Nam-Young
간행물명
Journal of the Korean Institute of Electromagnetic Engineering and Science
권/호정보
2009년|9권 2호|pp.98-104 (7 pages)
발행정보
한국전자파학회
파일정보
정기간행물|ENG|
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이 논문은 한국과학기술정보연구원과 논문 연계를 통해 무료로 제공되는 원문입니다.
서지반출

기타언어초록

An InGaP/GaAs MMIC LC VCO designed with Harmonic Noise Frequency Filtering(HNFF) technique is presented. In this VCO, internal inductance is found to lower the phase noise, based on an analytic understanding of phase noise. This VCO directly drives the on-chip double balanced mixer to convert RF carrier to IF frequency through local oscillator. Furthermore, final power performance is improved by output amplifier. This paper presents the design for a 1.721 GHz enhanced LC VCO, high power double balance mixer, and output amplifier that have been designed to optimize low phase noise and high output power. The presented asymmetric inductance tank(AIT) VCO exhibited a phase noise of -133.96 dBc/Hz at 1 MHz offset and a tuning range from 1.46 GHz to 1.721 GHz. In measurement, on-chip down-converter shows a third-order input intercept point(IIP3) of 12.55 dBm, a third-order output intercept point(OIP3) of 21.45 dBm, an RF return loss of -31 dB, and an IF return loss of -26 dB. The RF-IF isolation is -57 dB. Also, a conversion gain is 8.9 dB through output amplifier. The total on-chip down-converter is implanted in 2.56${ imes}$1.07 mm$^2$ of chip area.