Two logic transformations, De Morgan and re-substitution, are sufficient to convert a unate gate network (UGN) to a more general balanced inversion parity (BIP) network. Circuit classes of interest are discussed in detail. We prove that De Morgan and re-substitution transformations are test-set preserving for path delay faults. Using the results of this paper, we can easily show that a high-level test set for a function z that detects all path delay faults in any UGN realizing z also detects all path delay faults in any BIP realization of z.