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Design of a Cascaded H-Bridge Multilevel Inverter Based on Power Electronics Building Blocks and Control for High Performance
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  • Design of a Cascaded H-Bridge Multilevel Inverter Based on Power Electronics Building Blocks and Control for High Performance
  • Design of a Cascaded H-Bridge Multilevel Inverter Based on Power Electronics Building Blocks and Control for High Performance
저자명
Park. Young-Min,Ryu. Han-Seong,Lee. Hyun-Won,Jung. Myung-Gil,Lee. Se-Hyun
간행물명
Journal of power electronics : JPE
권/호정보
2010년|10권 3호|pp.262-269 (8 pages)
발행정보
전력전자학회
파일정보
정기간행물|ENG|
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이 논문은 한국과학기술정보연구원과 논문 연계를 통해 무료로 제공되는 원문입니다.
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기타언어초록

This paper proposes a practical design for a Cascaded H-Bridge Multilevel (CHBM) inverter based on Power Electronics Building Blocks (PEBB) and high performance control to improve current control and increase fault tolerance. It is shown that the expansion and modularization characteristics of the CHBM inverter are improved since the individual inverter modules operate more independently, when using the PEBB concept. It is also shown that the performance of current control can be improved with voltage delay compensation and the fault tolerance can be increased by using unbalance three-phase control. The proposed design and control methods are described in detail and the validity of the proposed system is verified experimentally in various industrial fields.