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Development of an Impedance Locus Model for a Protective Relay Dynamic Test with a Digital Simulator
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  • Development of an Impedance Locus Model for a Protective Relay Dynamic Test with a Digital Simulator
  • Development of an Impedance Locus Model for a Protective Relay Dynamic Test with a Digital Simulator
저자명
Kim. Soo-Nam,Lee. Myoung-Soo,Lee. Jae-Gyu,Rhee. Sang-Bong,Kim. Kyu-Ho
간행물명
Journal of electrical engineering & technology
권/호정보
2011년|6권 2호|pp.167-173 (7 pages)
발행정보
대한전기학회
파일정보
정기간행물|ENG|
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기타
이 논문은 한국과학기술정보연구원과 논문 연계를 통해 무료로 제공되는 원문입니다.
서지반출

기타언어초록

This paper presents a method for the development of the impedance locus to test the dynamic characteristics of protective relays. Specifically, using the proposed method, the impedance locus can comprise three impedance points, and the speed of impedance trajectory can be adjusted by frequency deviation. This paper is divided into two main sections. The first section deals with the configuration of impedance locus with voltage magnitude, total impedance magnitude, and impedance angle. The second section discusses the control of the locus speed with the means of the deviation between two frequencies. The proposed method is applied to two machine equivalent systems with offline simulation (i.e., PSCAD) and real-time simulation (i.e., real-time simulation environment) to demonstrate its effectiveness.