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무전해 식각법으로 합성한 Si 나노와이어 Field Effect Transistor 유연소자의 특성
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  • 무전해 식각법으로 합성한 Si 나노와이어 Field Effect Transistor 유연소자의 특성
저자명
이상훈,문경주,황성환,이태일,명재민,Lee. Sang-Hoon,Moon. Kyeong-Ju,Hwang. Sung-Hwan,Lee. Tae-Il,Myoung. Jae-Min
간행물명
한국재료학회지
권/호정보
2011년|21권 2호|pp.115-119 (5 pages)
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한국재료학회
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정기간행물|
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이 논문은 한국과학기술정보연구원과 논문 연계를 통해 무료로 제공되는 원문입니다.
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기타언어초록

Si Nanowire (NW) field effect transistors (FETs) were fabricated on hard Si and flexible polyimide (PI) substrates, and their electrical characteristics were compared. Si NWs used as channels were synthesized by electroless etching method at low temperature, and these NWs were refined using a centrifugation method to get the NWs to have an optimal diameter and length for FETs. The gate insulator was poly(4-vinylphenol) (PVP), prepared using a spin-coating method on the PI substrate. Gold was used as electrodes whose gap was 8 ${mu}m$. These gold electrodes were deposited using a thermal evaporator. Current-voltage (I-V) characteristics of the device were measured using a semiconductor analyzer, HP-4145B. The electrical properties of the device were characterized through hole mobility, $I_{on}/I_{off}$ ratio and threshold voltage. The results showed that the electrical properties of the TFTs on PVP were similar to those of TFTs on $SiO_2$. The bending durability of SiNWs TFTs on PI substrate was also studied with increasing bending times. The results showed that the electrical properties were maintained until the sample was folded about 500 times. But, after more than 1000 bending tests, drain current showed a rapid decrease due to the defects caused by the roughness of the surface of the Si NWs and mismatches of the Si NWs with electrodes.