In this study, the state estimation of electric power systems which contain FACTS and HVDC devices is investigated. A detailed steady-state model for the Unified Power Flow Controller (UPFC), the most general power flow controller, is formulated and implemented. The model is specified by the steady-state model parameters, such as voltage magnitudes and phase angles for the parallel and the series branches, and reactances associated with the parallel and the series transformers. The DC side HVDC bus net injections are assumed to be measured and error-free for the state estimation of HVDC. In order to include the new devices in the system, formulations of the state estimation algorithm are modified. Simulations of the test system are presented to demonstrate the use of the developed program. Test results show that the developed solution algorithms and formulations for the FACTS and HVDC devices are valid and effective.