This paper proposes a DTMB deinterleaver structure to reduce the SDRAM power consumption with buffer conversion and the single pointer-register structure. The DTMB deinterleaver with deep interleaving for higher performance consists of long delay buffers allocated on SDRAM. The conventional structure activates a new SDRAM row almost everytime when it reads and writes a datum. In the proposed structure, long buffers are transformed into several short buffers so that the number of row activations is reduced. The single pointer-register structure solves the problem of many pointer-registers. The experimental results show that the SDRAM power consumption can be reduced to around 37% with slight logic area reduction.