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저자명
홍표환,공대영,남재우,이종현,조찬섭,김봉환,Hong. Pyo-Hwan,Kong. Dae-Young,Nam. Jae-Woo,Lee. Jong-Hyun,Cho. Chan-Seob,Kim. Bonghwan
간행물명
Journal of sensor science and technology
권/호정보
2013년|22권 2호|pp.130-135 (6 pages)
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한국센서학회
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정기간행물|
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이 논문은 한국과학기술정보연구원과 논문 연계를 통해 무료로 제공되는 원문입니다.
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기타언어초록

This study proposed a noble process to fabricate TSV (Through Silicon Via) structure which has lower cost, shorter production time, and more simple fabrication process than plating method. In order to produce the via holes, the Si wafer was etched by a DRIE (Deep Reactive Ion Etching) process. The via hole was $100{mu}m$ in diameter and $400{mu}m$ in depth. A dielectric layer of $SiO_2$ was formed by thermal oxidation on the front side wafer and via hole side wall. An adhesion layer of Ti and a seed layer of Au were deposited. Soldering process was applied to fill the via holes with solder paste and metal powder. When the solder paste was used as via hole metal line, sintering state and electrical properties were excellent. However, electrical connection was poor due to occurrence of many voids. In the case of metal powder, voids were reduced but sintering state and electrical properties were bad. We tried the via hole filling process by using mixing solder paste and metal powder. As a consequence, it was confirmed that mixing rate of solder paste (4) : metal powder (3) was excellent electrical characteristics.