This paper gives an overview of fractional-N phase-locked loops (PLLs) with practical design perspectives focusing on a ${Delta}{Sigma}$ modulation technique and a finite-impulse response (FIR) filtering method. Spur generation and nonlinearity issues in the ${Delta}{Sigma}$ fractional-N PLLs are discussed with simulation and hardware results. High-order ${Delta}{Sigma}$ modulation with FIR-embedded filtering is considered for low noise frequency generation. Also, various architectures of finite-modulo fractional-N PLLs are reviewed for alternative low cost design, and the FIR filtering technique is shown to be useful for spur reduction in the finite-modulo fractional-N PLL design.