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Hardware Software Co-Simulation of the Multiple Image Encryption Technique Using the Xilinx System Generator
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  • Hardware Software Co-Simulation of the Multiple Image Encryption Technique Using the Xilinx System Generator
  • Hardware Software Co-Simulation of the Multiple Image Encryption Technique Using the Xilinx System Generator
저자명
Panduranga. H.T.,Naveen. Kumar S.K.,Sharath. Kumar H.S.
간행물명
Journal of information processing systems
권/호정보
2013년|9권 3호|pp.499-510 (12 pages)
발행정보
한국정보처리학회
파일정보
정기간행물|ENG|
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이 논문은 한국과학기술정보연구원과 논문 연계를 통해 무료로 제공되는 원문입니다.
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기타언어초록

Hardware-Software co-simulation of a multiple image encryption technique shall be described in this paper. Our proposed multiple image encryption technique is based on the Latin Square Image Cipher (LSIC). First, a carrier image that is based on the Latin Square is generated by using 256-bits of length key. The XOR operation is applied between an input image and the Latin Square Image to generate an encrypted image. Then, the XOR operation is applied between the encrypted image and the second input image to encrypt the second image. This process is continues until the nth input image is encrypted. We achieved hardware co-simulation of the proposed multiple image encryption technique by using the Xilinx System Generator (XSG). This encryption technique is modeled using Simulink and XSG Block set and synthesized onto Virtex 2 pro FPGA device. We validated our proposed technique by using the hardware software co-simulation method.