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Generalized Hardware Post-processing Technique for Chaos-Based Pseudorandom Number Generators
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  • Generalized Hardware Post-processing Technique for Chaos-Based Pseudorandom Number Generators
  • Generalized Hardware Post-processing Technique for Chaos-Based Pseudorandom Number Generators
저자명
Barakat. Mohamed L.,Mansingka. Abhinav S.,Radwan. Ahmed G.,Salama. Khaled N.
간행물명
ETRI journal
권/호정보
2013년|35권 3호|pp.448-458 (11 pages)
발행정보
한국전자통신연구원
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정기간행물|ENG|
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이 논문은 한국과학기술정보연구원과 논문 연계를 통해 무료로 제공되는 원문입니다.
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기타언어초록

This paper presents a generalized post-processing technique for enhancing the pseudorandomness of digital chaotic oscillators through a nonlinear XOR-based operation with rotation and feedback. The technique allows full utilization of the chaotic output as pseudorandom number generators and improves throughput without a significant area penalty. Digital design of a third-order chaotic system with maximum function nonlinearity is presented with verified chaotic dynamics. The proposed post-processing technique eliminates statistical degradation in all output bits, thus maximizing throughput compared to other processing techniques. Furthermore, the technique is applied to several fully digital chaotic oscillators with performance surpassing previously reported systems in the literature. The enhancement in the randomness is further examined in a simple image encryption application resulting in a better security performance. The system is verified through experiment on a Xilinx Virtex 4 FPGA with throughput up to 15.44 Gbit/s and logic utilization less than 0.84% for 32-bit implementations.