- 고속 전원차단 회로 설계 제작 및 측정
- ㆍ 저자명
- 정상훈,이남호,조성익,Jeong. Sang-Hun,Lee. Nam-Ho,Cho. Seong-Ik
- ㆍ 간행물명
- 전기학회논문지= The Transactions of the Korean Institute of Electrical Engineers
- ㆍ 권/호정보
- 2014년|63권 4호|pp.490-494 (5 pages)
- ㆍ 발행정보
- 대한전기학회
- ㆍ 파일정보
- 정기간행물| PDF텍스트
- ㆍ 주제분야
- 기타
In this paper, a design of high-speed power-off circuit and analysis. The incidence of high-dose transient radiation into the silicon-based semiconductor element induces the photocurrent due to the creation of electron-hole pairs, which causes the upset phenomenon of active elements or triggers the parasitic thyristor in the element, resulting in latch-up. High speed power-off circuit was designed to prevent burn-out of electronic device caused by Latch-up. The proposed high speed power-off circuit was configured with the darlington transistor and photocoupler so that the power was interrupted and recovered without the need for an additional circuit, in order to improve the existing problem of SCR off when using the thyristor. The discharge speed of the high speed power interruption circuit was measured to be 19 ${mu}s$ with 10 ${mu}F$ and 500 ${Omega}$ load, which was 98% shorter than before (12.8 ms).