In this paper, a couple of 4-channel differential transimpedance amplifier arrays are realized in a standard 0.18um CMOS technology for the applications of linear LADAR(laser detection and ranging) systems. Each array targets 1.25-Gb/s operations, where the current-mode chip consists of current-mirror input stage, a single-to-differential amplifier, and an output buffer. The input stage exploits the local feedback current-mirror configuration for low input resistance and low noise characteristics. Measurements demonstrate that each channel achieves $69-dB{Omega}$ transimpedance gain, 2.2-GHz bandwidth, 21.5-pA/sqrt(Hz) average noise current spectral density (corresponding to the optical sensitivity of -20.5-dBm), and the 4-channel total power dissipation of 147.6-mW from a single 1.8-V supply. The measured eye-diagrams confirms wide and clear eye-openings for 1.25-Gb/s operations. Meanwhile, the voltage-mode chip consists of inverter input stage for low noise characteristics, a single-to-differential amplifier, and an output buffer. Test chips reveal that each channel achieves $73-dB{Omega}$ transimpedance gain, 1.1-GHz bandwidth, 13.2-pA/sqrt(Hz) average noise current spectral density (corresponding to the optical sensitivity of -22.8-dBm), and the 4-channel total power dissipation of 138.4-mW from a single 1.8-V supply. The measured eye-diagrams confirms wide and clear eye-openings for 1.25-Gb/s operations.