Voice-over Internet Protocol (VoIP) telephony which is the transmission of real-time voice over an internet protocol (IP) data network, is increasingly becoming a variant telecommunication technology that one day may surpass the old analog and digital telephone systems. The Quality-of-Service (QoS) factor is an important parameter to be considered when measuring the performance of a VoIP system. Algorithmic delay (latency) may influence the QoS of a VoIP system. This paper presents the hardware implementation of the Open-Loop Pitch Analysis component of the Conjugate-Structure Algebraic-Code-Excited Linear-Prediction (CS-ACELP) speech compression algorithms. The Open-Loop Pitch Analysis units were implemented in hardware using Xilinx 11.1 ISE, after which ITU-T test vectors were used to determine whether they were equivalent implementations of the Open-Loop Pitch Analysis. The algorithmic delays of hardware-implementations were obtained via simulation using Modelsim XE 6.4b while the algorithmic delays of the software-implemented speech compression algorithms were obtained by software profiling using the GPROF profiler. After comparison the algorithmic delays of the hardware-implementations of the Open-Loop Pitch Analysis was found to be shorter than the algorithmic delays of their software-implemented and hardware-implemented counterparts.
1. Introduction 2. Background Verview of CS-Acelp Speech Compression Algorithm 3. Review of Existing Research 4. Profiling of Software Implemntations of the Open-Loop Pitch Analysis Component of The CS-ACELP 5. Design of the of the Open-Loop Pitch Analysis Component of the CS-ACELP Speech Compression Algorithm 6. Hardware Implementation of the of the Open-Loop Pitch Analysis Component of the CS-ACELP Speech Compression Algorithm 7. Verification and Validation of the Open-Loop Pitch Analysis Component of the CS-ACELP Speech Compression Algorithm 9. Conclusions References
