In this article, we evaluated the structural merits and the validity of a partially insulated MOSFET (PiFET) through the fabrication of prototype transistors and an 80 nm 512M DDR DRAM with partially-insulated cell array transistors (PiCATs). The PiFETs showed the outstanding short channel effect immunity and off-current characteristics over the conventional MOSFET, resulting from self-induced halo region, self-limiting SID shallow junction, and reduced junction area due to PiOX layer formation. The DRAM with PiCATs also showed excellent data retention time. Thus, the PiFET can be a promising alternative for ultimate scaling of planar MOSFET.