In this paper, we analyze packaging data of th eprinted board assemblies (PBAs) of an ATM switching system (the first network test bed) by statistical methods and discuss the relation between devices packaging area of a PBA and power consumption by a regression nalysis method. As a result, we evaluate the maximum power consumption of the PBA. And, this paper presents a forecasting mehtod of the packagable maximum power consumption per a PBA when TTL devices are replaced by ASIC or FPGA ones in a PBA. And, we forecast the possibility of packaging ATM switch circuit packs in the near future form a statistical viewpoint. These evaluation and forecasting results can reduce much development cost and time because trial nd error will not be made using these useful data when phase II ATM switching system will be realized in the near future.